What's New

NOTE: The Jupyter Notebook below is included in the Chimera SDK and can be run interactively by running the following CLI command:

$ quadric sdk notebook

From the Jupyter Notebook window in your browser, select the notebook named /quadric/sdk-cli/examples/doc_template/whats_new.ipynb.

Quadric Chimera SDK 26.07 – What's New

A Chimera splitting into a pack — the monthly cut goes multicore.

26.07 is a monthly MINOR release. It rolls up the single 26.06 → 26.07 cut, not a quarter. Where 26.06 landed the demo quarter (pi0.5 VLA, BEVFormer, Whisper multicore, Qwen), 26.07 scales those workloads across cores — flash attention and the pi0.5 VLA pipeline both go multicore at production sequence length — and adds the first kernel building blocks for the next LLM wave: Mixture-of-Experts routing and Gated DeltaNet linear attention.

Summary

• Two New End-to-End Demos — DETR-R101 Detection + SegFormer-B0 Segmentation: Full DETR-R101 (ResNet-101 backbone, COCO) compiles as one full-graph GPNPU unit and clears an ≥80% box-agreement gate against the ONNX Runtime reference; a Cityscapes SegFormer-B0 segments at ~88% per-pixel agreement. Both INT8, ISS-validated. Learn More
• Flash Attention Scales Across Cores: Multicore prefill for MHA / GQA / MQA via a FlashPartition mode selector. Pi0.5 GQA prefill runs 2.24× faster than the scores-materializing path at 8 cores (bit-identical, 7.0× multicore scaling), and long-context FP16 prefill (seq=8192) now fits L2. Learn More
• pi0.5 VLA Runs Multicore at Production Sequence Length: The fused LM-prefill + Action-Expert pipeline runs on 8 GPNPUs at the full seq=968: 42.39M → 9.54M cycles (~4.4×). Learn More
• First Kernels for the Next LLM Wave: Mixture-of-Experts (Qwen3.5-MoE router + routed-expert path) and Gated DeltaNet linear attention (Qwen3.6 full decode layer + chunked prefill) land as sweep-tested kernels. Learn More
• Fused SwiGLU Gate+Up FFN: nn::gateUpProjection fuses quantize → gate → SwiGLU → up → multiply into one M-tiled op (~10.7% on qwen3 prefill), generalized beyond qwen3 with a selectable swish/gelu activation. Learn More
• Multi-Core Rollout Continues Across Compiler and Kernels: CGC gains multi-core element-wise, matmul width-split, ONNX Gather, and strided-slice paths; the runtime adds multi-core softmax (spatial and single-axis) and all-axis concat. Learn More
• ONNX LSTM + Broader Quantized-Layer Coverage: ONNX LSTM (forward / reverse / bidirectional) lowers to a native kernel, and the torch.export quantization path gains converters for ten quantized layer types. Learn More

Detailed Changes

Detailed Changes

Dev Studio

26.06 landed the quarter's demo pipelines. 26.07 adds two more customer-facing end-to-end pipelines — DETR-R101 detection and SegFormer-B0 segmentation — and continues performance and robustness work on the pipelines already shipped.

New Notebooks!

Two new end-to-end model pipelines land this cut, both INT8 and ISS-validated against an ONNX Runtime reference:

• DETR-R101 end-to-end: The full DETR-R101 detector (ResNet-101 backbone, COCO, 384×960, ~60M params, 6 encoder + 6 decoder layers) compiles as one full-graph Chimera unit — backbone → input projection → transformer encoder/decoder → prediction heads — quantized in a single INT8 calibration pass, no split or boundary handoff. The decoder self- and cross-attention (all 6 layers) run through a custom op backed by nn::multiheadAttention (int8 KCache/VCache SDPA), including a constant-Q variant for the layer-0 cross-attention; the backbone, encoder, and prediction heads run on the native path. Decoded detections are matched by IoU + class label against the full quantized graph on ONNX Runtime; the run clears the ≥80% box-agreement pass gate. Target QC-U, 8 MB L2, 16 MACs/PE, 1.56 GHz.
• SegFormer-B0 (Cityscapes): A Cityscapes-trained SegFormer-B0 compiles end-to-end with CGC and runs on the ISS. SegFormer's efficient (spatial-reduction) attention compiles as a first-class GPNPU operator — CGC factors out only the requantization following the K/V projections and emits a typed stub the notebook fills with a single symmetric rescale. On a street scene the on-chip segmentation matches the ONNX Runtime reference at ~88% per-pixel agreement. Target QC-U, 8 MB L2, prefetch disabled.

Notebook Updates

• pi0.5 VLA multicore at full sequence: a persistent KV-cache pipeline threads the prefill → euler chain across 8 cores at the production seq=968 — 42.39M → 9.54M cycles (~4.4×), cosine ≥ 0.98 vs the single-core reference.
• YOLOX-Tiny switch: a one-line MODEL toggle added to the YOLOX end-to-end notebook runs the fully-on-GPNPU detector as YOLOX-Tiny (416×416) on QC-N with 4 MB L2 (YOLOX-Tiny fits 4 MB where YOLOX-M needs 8 MB), CPU and GPNPU detections matching (7/7).
• ASVspoof anti-spoofing recompiled 2.9× faster: the full LFCC front-end + LCNN + 2× BiLSTM + classifier pipeline drops from 9,751,856 → 3,341,249 cycles with identical decisions (16/16 classification, CPU↔ISS 16/16, MSE 3.8e-6) — QC-N @ 1.0 GHz, 3.34 ms, ~1200× real-time on a 4-second clip.
• YOLOX optimization passes enabled: the YOLOX end-to-end ChiPy notebook now turns on enhanced_conv_fusion, enable_prefetching, enable_qlut, enable_extra_aggressive_sinking, advanced_directives, and check_lrm_overflow in compile_and_run.
• Data-source hardening: pinned model/data downloads that broke CI moved to the Quadric S3 bucket — l2cs gaze (dead Google Drive), Whisper LibriSpeech calibration (dead Hugging Face datasets API), and llama TinyStories calibration (Hugging Face 403; ~1.6 GB → ~32 MB). Behavior identical.

Core

CGC

• Multi-core splitting rollout:
  • 3-D element-wise ops (gelu, sigmoid, mul, requantize, LUT activations) on the TILE_COLUMN path now split across cores along width — previously 1.0× at 4 cores.
  • Multi-core width splitting for ROW_HEIGHT matmul/dense regions: a wide FC layer at batch=1 that used to run on one core now distributes output columns. RH-layout rank-3 matmul gained broadcast adapters + batched external splitting, compiling the CenterPoint Voxel Encoder (A[64000,20,10] @ B[10,16]) end-to-end.
  • ONNX Gather / take lowers under num_cores > 1 (batch-split, spatial-split, batch-axis) and gained multi-index constant-gather support; strided_slice added with multi-core / external-split fixes.
  • Multi-consumer producer split/defuse via per-consumer-edge keying, unblocking SigLIP FX32 residual-heavy fan-out; batch-handling fixes bring the pi0.5 SigLIP front end up on 8 cores.
• New operator / frontend coverage:
  • ONNX LSTM (forward / reverse / bidirectional) lowers to a single opaque contrib.epu.lstm onto the native chimera::nn::lstm / lstmBidirectional kernels.
  • Large-kernel convolutions route through the border-free general data-aggregation path, enabling 1-D convs with K ≥ 7 and large/asymmetric 2-D kernels (9×9, 3×9) that previously failed the halo assert.
  • The canonicalizer preserves int8 dtype through SpaceToDepth / DepthToSpace, fixing the quantized ViT patch-embedding path.
  • Last-axis (per-row) softmax lowering, pairing with the runtime's new single-axis softmax kernel.
  • FP16 convolution gains a biased path (bias + VAP + LRM splitting) validated to int8 parity.
• Quantization (torch.export path):
  • Module converters for QMatMul, QConv2d, QAdd, QMul, QSoftmax, QLayerNorm, QEmbedding, QRMSNorm, QGELU, and QSiLU — ten quantized layer types mapping calibrated PyTorch modules to GPNPU Relay IR through chipy.export(), exercised by the OpenPI VLA workload.
  • A config-based per-layer support checker reports settings CGC cannot auto-consume before the export gate runs, sharing one validation rule set with the converters.
  • The quantization reference is now the single golden source for numerics: a validation path plus a rounding fix in the INT8 matmul requantize that removed systematic off-by-1s vs the ISS on ~12.5% of outputs.
• Attention: multi-MROI batched general_attention for sequences longer than array² (single/multi-core, single/multi-batch); head- and query-broadcast attention masks in the masked post-QK path. Several DETR fixes stem from the 26.06 self/cross-attention consolidation — const-query cross-attention no longer crashes the GENERAL path, and a cross-attn misclassification that skipped quant scheduling on the whole decoder is fixed.

CCL

• Flash Attention, prefill to multicore: scalable multicore flash prefill across two production partition modes chosen via the FlashPartition template param — headPartition (MHA: each core owns a KV-head subset, the default the cost model already resolved to for existing callers) and groupsParallel (GQA/MQA: query heads split across cores over shared KV, no KV replication, no cross-core reduction). Pi0.5 GQA prefill (q32/m16, 8 cores): 325,019 cycles vs 727,546 for scores-materializing attention (2.24×), bit-identical, 7.0× multicore scaling; an optional single-pass softmax is ~20% faster again for a small accuracy tradeoff. dtype-agnostic (INT8 + FP16), and existing qwen3 / gemma3 / whisper callers stay byte-identical.
• Flash long-context fit: eliminating a per-head L2 intermediate (a direct L2→DDR transpose via a RuntimeTensor view) makes long-context FP16 prefill fit — seq=8192 goes from a silent L2 overflow to passing (56.6M cycles, max abs diff 9.9e-5). The saving scales with head size, so it matters most for wide-head models (qwen3 headSize=512).
• pi0.5 multicore enablement: five latent single-KV-head (GQA) bugs fixed to run the pi0.5 LM-prefill + Action-Expert kernel on 4 and 8 GPNPUs at seq=968, plus a group-parallel GQA-attention optimization — the runtime side of the notebook mc=8 result above. K-cache prefill multicore transpose corruption also fixed.
• Next-gen LLM building blocks:
  • Mixture-of-Experts (Qwen3.5-MoE): both halves of the decode block land — the router (nn::moeRouter: matmul → softmax over experts → topK → weight renormalization, validated across E ∈ {4…256}, k ∈ {2…8} and three real MoE configs) and the routed-expert path (nn::moeRoutedExpertPath: gather each of the k selected experts' weights, run the fused SwiGLU FFN, combine by routing weight). Plus partial-RoPE support for the MoE attention layout.
  • Gated DeltaNet linear attention (Qwen3.6): the decode step is assembled into a full wired layer (nn::gatedDeltaNetDecode, all v-heads) over the building-block op set — l2NormalizeHead, a per-layer DeltaNetState conv-ring + recurrent-state cache, causalConv1dUpdate, recurrentGatedDeltaRule (fused decay + rank-1 update), and the layer-level gates / gated RMS-norm / GQA-expand / softplus — and a chunked prefill kernel (nn::chunkedGatedDeltaRule: within-chunk WY/UT solve + inter-chunk state recurrence) is the prefill analogue. Each sweep-tested against the pinned HF qwen3_next reference.
• Fused SwiGLU gate+up FFN: nn::gateUpProjection fuses quantize → gate → SwiGLU → up-proj → multiply into one M-tiled op for both decode and prefill, removing the intermediate DDR writes (~1.5% autoregressive, ~10.7% prefill). Generalized beyond qwen3 with a selectable swish/gelu activation param.
• Matmul: measurement-driven dispatch — a calibration harness sweeps each shape × force-combo × HW target through the ISS and emits an optimal-plan lookup table that a compile-time hook swaps in for cold-path shapes, now keyed per workload so all three measured paths (qgemm, FP16 matmul, qLinear) consult their own calibrated plans rather than only qgemm. Quantized-weight (NBits) correctness: an L2-budget overcommit and a general-path multi-row-C broadcast bug, and a negative transfer-count crash on multi-GPNPU per-core-column splits (Whisper QKV N=1152). FP16 matmul hoists the weight FX32→FP16 conversion out of the output-row loop on the small-K GEMV paths.
• Multi-core kernels: softmax spatial-reduction multicore and single-axis (height/width) reduction, with a user-set L2-budget param; all-axis (B/C/H/W) tilewise concat splitting.
• Data movement: DDR→DDR memCpy now bounces through L2 via a fast-ELS ExtFlow instead of the general flows — 4.2× on a single large copy, no API change; runtime ExtFlow can pack >1 MinROI per L2 buffer along the innermost axis to cut ELS DMA setups; bilinear 2× upscale for >1-byte types (e.g. FX32) drops the per-pixel gather for a ReadFlow + scatter path — −48% cycles.
• Attention correctness: const-Q attention K/V projection weight offsets corrected for the [K, V] (no Q) packing — the DETR decoder cross-attention runs to completion on the ISS.

LLVM

• The epu_conv intrinsic is reduced to a single argument, with the convolution special-register setup moving to the SDK conv path — a backend-internal cleanup with no change to the public API.

ISS / Archsim Performance

• Simulation speed: an optimizer pass replaces the predicate stack with a fixed-size inline structure, caches the active-predicate result, and skips inactive cores before the MAC / address-increment work — targeting the top ResNet-18 ISS hotspots.
• Cycle accuracy: a patch-mesh pause-controller off-by-one is fixed, so cycle counts reported for pause-heavy kernels are correct — reported ISS cycle counts shift slightly versus 26.06 as a result.
• Dev ergonomics: a QISS_TRAP_ON_FAILURE env var raises SIGTRAP at check/error sites so a debugger breaks at the origin, in release builds too; the benchmark-comparison tool switched to interleaved runs and the median (over the mean) to reduce outlier sensitivity. The MLS flow-queue depth constant is now exported to the SDK so the runtime can add overflow protection.

Bug Fixes

• groupNorm FPS regression recovered: a prior reciprocal-multiply change routed the L2 second pass through per-chunk flows, adding barriers and stalling the array (−3.7% / −3.8% FPS on the riformer family). The single-pass L2 streaming flow is restored while keeping the reciprocal-multiply optimization.
• Normalization divide-by-zero cliff: rmsNorm, layerNormWidth, and L2-normalization now take the square root of the full-precision int64 accumulator instead of narrowing first. The old path truncated tiny variances and the eps floor to 0 on small / near-constant inputs, producing a zero norm → divide-by-zero → garbage. Surfaced in the Qwen3.6 Gated DeltaNet decode layer, previously masked by loose end-to-end tolerances.
• MaxPool correctness: a full-spatial-extent maxpool (e.g. 8×8 kernel, stride 8) dropped its store and over-restricted the participation mask, producing wrong output across array sizes; int8 2×2 stride-2 maxpool read the wrong layout for odd channel counts, now handled with a channel-major overload.
• Matmul correctness: rank-2 matmul opaque-op lowering (bias-add / softmax tails now flowing rank-2 tensors); an L2 overlap for a dynamic B under K-split; NS-flow codegen for batched multi-channel 4-D inputs; a broadcast-const sink for expanded per-channel constants (DETR).
• Compilation / ISS: concat layout when a rank-changing reshape/transpose is folded into it; a resize channel-split slice overrun on UNet; the parameters.json output-tensor entry restored for cosim/ISS verification; an in-guard L2 free-reserve ordering fix for the bevformer 4-core notebook; a host-side early-deconstruction race segfault on the experimental device.

Breaking Changes & Migration Notes

A minor release — the surface is small. Full before/after detail is in the Migration Guide.

• nn::qwen3PrefillGateUpProjection renamed to nn::gateUpProjection. A deprecated forwarding wrapper keeps existing callers compiling; migrate to gateUpProjection before the alias is removed.
• Verified-unused internal helpers removed: a batch of internal kernel helpers confirmed unused (via the sdk-cli and tvm CI suites) were removed. Public-API users are unaffected; anyone calling internal entry points directly should re-check.
• ISS cycle counts shift slightly vs 26.06 from the patch-mesh pause-tracking fix. This corrects previously over-counted cycles on pause-heavy kernels; it is not a compiler or kernel change.

What's next: the Mixture-of-Experts and Gated DeltaNet kernels landed this cut as sweep-tested building blocks; the end-to-end Qwen3.5-MoE and Qwen3.6 reference pipelines are the next step. Expect continued multi-core rollout and perf tuning on the flash-attention and FFN paths.

Performance Summary

The chart below shows the top FPS movers for the 26.07 fleet vs 26.06. As expected for a monthly cut, the fleet delta is small and clean — the top mover is ResNet-50 group-norm (~6.7% on QC-U), from the groupNorm streaming fix, with the riformer-softmax networks recovering and the rest of the fleet flat. The end-to-end and component wins below are the release's real story.

End-to-end and component speedups (from release PR benchmarks):

• Flash Attention, multicore prefill: Pi0.5 GQA prefill at 8 cores runs 2.24× faster than the scores-materializing path (325,019 vs 727,546 cycles), bit-identical, with 7.0× multicore scaling; long-context FP16 prefill (seq=8192) now fits L2.
• pi0.5 VLA, multicore end-to-end: 42.39M → 9.54M cycles (~4.4×) at the production seq=968 on 8 GPNPUs.
• Fused SwiGLU gate+up FFN: ~10.7% on qwen3 prefill (M=1024) from removing the gate/up DDR intermediates.
• ASVspoof anti-spoofing pipeline: 9.75M → 3.34M cycles (2.9×) with identical decisions, QC-N @ 1.0 GHz.
• DDR→DDR memCpy: 4.2× via a fast-ELS L2 bounce instead of the general flows.

from IPython.display import Image, display
from whats_new_utils import compare_current_release_vs_last_release

release_images = compare_current_release_vs_last_release("26.07", "26.06")
display(Image(release_images[0]))

Migration Guide

26.07 is a monthly minor release; the migration surface is small. The items below are ordered by likely blast radius.

nn::qwen3PrefillGateUpProjection Renamed to nn::gateUpProjection

What changed: The fused gate+up FFN op was generalized beyond qwen3 and renamed. A deprecated forwarding wrapper is kept in place, so this is a deprecation this cut, not a removal.

Before (≤26.06):

nn::qwen3PrefillGateUpProjection(/* ... */);

After (26.07):

nn::gateUpProjection(/* ... */);   // add a GateActivation template arg (default swish) for gelu

Action required: Migrate call sites to nn::gateUpProjection before the deprecated qwen3PrefillGateUpProjection alias is removed in a later cut. Pure rename — no behavior change.

Why: The op's pipeline (quantize → gate proj → activation → up proj → multiply) is a generic SwiGLU-style gate+up FFN, not specific to qwen3, and is now reusable by any network with that FFN shape.

Verified-Unused Internal Helpers Removed

What changed: A batch of internal kernel helpers confirmed unused were removed as part of a maintenance cleanup.

Before / After: No public-API call-site change. Each removal was confirmed unused by running the sdk-cli and tvm CI suites (no failures) before merge.

Action required: None for users on the public API. Anyone calling internal entry points directly should re-check against the current headers and move to the supported API.

Why: Reducing the unused internal surface keeps the kernel library maintainable.

ISS Cycle Counts Shift Slightly vs 26.06

What changed: A patch-mesh pause-controller off-by-one (the step-cycle counter was not advanced on every pause step) is fixed, so cycle counts reported for pause-heavy kernels change relative to 26.06.

Action required: If you compare ISS cycle counts across releases, re-baseline against 26.07. This corrects previously over-counted cycles; it is not a compiler or kernel change.

Why: The pause step was being counted one cycle too many, and the error accumulated on kernels that pause frequently — the fix makes reported cycles match the patch-mesh spec.